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Bi-quinary coded decimal
From Wikipedia, the free encyclopedia
Bi-quinary coded decimal is a numeral encoding scheme used in many abacuses and in some early computers, including the Colossus. The term bi-quinary indicates that the code comprises both a two-state (bi) and a five-state (quinary) component.
Several different representations of bi-quinary coded decimal have been used by different machines. The two-state component is encoded as one or two bits, and the five-state component is encoded using three or five bits. Some examples are:
- IBM 650 – 7 bits (two ‘bi’ bits: 0 5 and five ‘quinary’ bits: 0 1 2 3 4) with error checking (exactly one ‘bi’ bit and one ‘quinary’ bit set in a valid digit); in the picture of the front panel below, the bi-quinary encoding of the internal workings of the machine are evident in the arrangement of the lights (active bits are just visible)
| Value | 05-01234 Bits | 
|
| 0 | 10-10000 | |
| 1 | 10-01000 | |
| 2 | 10-00100 | |
| 3 | 10-00010 | |
| 4 | 10-00001 | |
| 5 | 01-10000 | |
| 6 | 01-01000 | |
| 7 | 01-00100 | |
| 8 | 01-00010 | |
| 9 | 01-00001 |
- UNIVAC 60 and UNIVAC 120 – 5 bits (four ‘quinary’ bits: 1 3 5 7 and one ‘bi’ bit: 9)
| Value | 13579 bits |
| 0 | 00000 |
| 1 | 10000 |
| 2 | 10001 |
| 3 | 01000 |
| 4 | 01001 |
| 5 | 00100 |
| 6 | 00101 |
| 7 | 00010 |
| 8 | 00011 |
| 9 | 00001 |
- UNIVAC Solid State – 4 bits (one ‘bi’ bit: 5 and three binary coded ‘quinary’ bits: 4 2 1) with 1 parity check bit
| Value | p-5-421 bits |
| 0 | 1-0-000 |
| 1 | 0-0-001 |
| 2 | 0-0-010 |
| 3 | 1-0-011 |
| 4 | 0-0-100 |
| 5 | 0-1-000 |
| 6 | 1-1-001 |
| 7 | 1-1-010 |
| 8 | 0-1-011 |
| 9 | 1-1-100 |
- Univac LARC – 4 bits (one ‘bi’ bit: 5 and three ring counter coded ‘quinary’ bits) with 1 parity check bit
| Value | p-5-qqq bits |
| 0 | 1-0-000 |
| 1 | 0-0-001 |
| 2 | 1-0-011 |
| 3 | 0-0-111 |
| 4 | 1-0-110 |
| 5 | 0-1-000 |
| 6 | 1-1-001 |
| 7 | 0-1-011 |
| 8 | 1-1-111 |
| 9 | 0-1-110 |