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In digital circuit theory, sequential logic is a type of logic circuit whose output depends not only on the present input but also on the history of the input. This is in contrast to combinatorial logic, whose output is a function of, and only of, the present input. In other words, sequential logic has storage (memory) while combinatorial logic does not.

Sequential logic is therefore used to construct some types of computer memory, other types of delay and storage elements, and finite state machines. Most practical computer circuits are a mixture of combinatorial and sequential logic.

There are two types of finite state machine that can be built from sequential logic circuits:

• Moore machine: the output depends only on the internal state. (Since the internal state only changes on a clock edge, the output only changes on a clock edge too).
• Mealy machine: the output depends not only on the internal state, but also on the inputs.

Nearly all sequential logic today is 'clocked' or 'synchronous logic' logic: there is a 'clock' signal, and all internal memory (the 'internal state') changes only on a clock edge. The basic storage element in sequential logic is the flip-flop.

The main advantage of synchronous logic is its simplicity. Every operation in the circuit must be completed inside a fixed interval of time between two clock pulses, called a 'clock cycle'. As long as this condition is met (ignoring certain other details), the circuit is guaranteed to be reliable.

Synchronous logic also has two main disadvantages, as follows.

1. The clock signal must be distributed to every flip-flop in the circuit. As the clock is usually a high-frequency signal, this causes power dissipation - in other words, heat. Even the flip-flops that are doing nothing consume a small amount of power, thereby generating waste heat.
2. The maximum possible clock rate is determined by the slowest logic path in the circuit, otherwise known as the critical path. This means that every logical calculation, from the simplest to the most complex, must complete in one clock cycle. One way around this limitation is to split complex operations into several simple operations, a technique known as 'pipelining'. This technique is prominent within microprocessor design, and helps to improve the clock rate of modern processors.

• Automatic test pattern generation

• Katz, R, and Boriello, G. Contemporary Logic Design. Upper Saddle River, NJ: Prentice Hall. 2005. ISBN 0-201-30857-6.