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A universal asynchronous receiver/transmitter (usually abbreviated UART and pronounced /ˈjuːɑrt/) is a type of "asynchronous receiver/transmitter", a piece of computer hardware that translates data between parallel and serial forms. UARTs are commonly used in conjunction with other communication standards such as EIA RS-232.

A UART is usually an individual (or part of an) integrated circuit used for serial communications over a computer or peripheral device serial port. UARTs are now commonly included in microcontrollers. A dual UART or DUART combines two UARTs into a single chip. Many modern ICs now come with a UART that can also communicate synchronously; these devices are called USARTs.

Contents 1 Definition 1.1 Transmitting and receiving serial data 1.2 Asynchronous receive and transmit 1.3 Serial to Parallel Algorithm 2 History 3 Structure 4 Special Receiver Conditions 4.1 Overrun Error 4.2 Framing Error 4.3 Parity Error 4.4 Break Condition 5 See also 6 External Links

Bits have to be moved from one place to another using wires or some other medium. Over many miles, the expense of the wires becomes large. To reduce the expense of long communication links carrying several bits in parallel, data bits are sent sequentially, one after another, using a UART to convert the transmitted bits between sequential and parallel form at each end of the link. Each UART contains a shift register which is the fundamental method of conversion between serial and parallel forms.

The UART usually does not directly generate or receive the external signals used between different items of equipment. Typically, separate interface devices are used to convert the logic level signals of the UART to and from the external signalling levels.

External signals may be of many different forms. Voltage is by far the most common kind of signalling used. Examples of standards for voltage signalling are RS-232, RS-422 and RS-485 from the EIA. Historically, the presence or absence of current (in current loops) was used in telegraph circuits.

Some signalling schemes do not use electrical wires. Examples of such are optical fiber, infrared, and (wireless) Bluetooth in its Serial Port Profile (SPP). Some signalling schemes use modulation of a carrier signal (with or without wires). Examples are modulation of audio signals with phone line modems, RF modulation with data radios, and the DC-LIN for power line communication.

Communication may be "full duplex" (both send and receive at the same time) or "half duplex" (devices take turns transmitting and receiving).

As of 2006, UARTs are commonly used with RS-232 for embedded systems communications. It is useful to communicate between microcontrollers and also with PCs. Many chips provide UART functionality in silicon, and low-cost chips exist to convert logic level signals (such as TTL voltages) to RS-232 level signals (for example, Maxim's MAX232).

In asynchronous transmitting, teletype-style UARTs send a "start" bit, five to eight data bits, least-significant-bit first, an optional "parity" bit, and then one, one and a half, or two "stop" bits. The start bit is the opposite polarity of the data-line's idle state. The stop bit is the data-line's idle state, and provides a delay before the next character can start. (This is called asynchronous start-stop transmission). In mechanical teletypes, the "stop" bit was often stretched to two bit times to give the mechanism more time to finish printing a character. A stretched "stop" bit also helps resynchronization.

The parity bit can either make the number of "one" bits between any start/stop pair odd, or even, or it can be omitted. Odd parity is more reliable because it assures that there will always be at least one data transition, and this permits many UARTs to resynchronize.

In synchronous transmission, the clock data is recovered separately from the data stream and no start/stop bits are used. This improves the efficiency of transmission on suitable channels since more of the bits sent are usable data and not character framing. An asynchronous transmission sends nothing over the interconnection when the transmitting device has nothing to send; but a synchronous interface must send "pad" characters to maintain synchronism between the receiver and transmitter. The usual filler is the ASCII "SYN" character. This may be done automatically by the transmitting device.

USART chips have both synchronous and asynchronous modes.

A data communication pulse can only be in one of two states but there are many names for the two states. When on, circuit closed, low voltage, current flowing, or a logical zero, the pulse is said to be in the "space" condition. When off, circuit open, high voltage, current stopped, or a logical one, the pulse is said to be in the "mark" condition. A character code begins with the data communication circuit in the space condition. If the mark condition appears, a logical one is recorded otherwise a logical zero.

Figure 1 shows this format.

                  start|<-  five to eight data bits  ->| stop bit(s)
              0    ----  -  -  -  -  -  -  -  -  -  -              Space (logic low, low data-wire voltage) 
                   |   |   |   |   |   |   |   |   |   |   |   |
                   | S | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | S | S |
                   |   |   |   |   |   |   |   |   |   |   |   |
              1        -  -  -  -  -  -  -  -  -  -  -  --------    Mark (logic high, high data-wire voltage)

                      Figure 1.  Asynchronous Code Format.
     The right-most bit is always transmitted first.  If parity is present,
      the parity bit comes after the data bits but before the stop bit(s).

The start bit is always a 0 (logic low), which is also called a space. The start bit signals the receiving DTE that a character code is coming. The next five to eight bits, depending on the code set employed, represent the character. In the ASCII code set the eighth data bit may be a parity bit. The next one or two bits are always in the mark (logic high, i.e., '1') condition and called the stop bit(s). They provide a "rest" interval for the receiving DTE so that it may prepare for the next character which may be after the stop bit(s). The rest interval was required by mechanical Teletypes which used a motor driven camshaft to decode each character. At the end of each character the motor needed time to strike the character bail (print the character) and reset the camshaft.

There are six basic steps in receiving a serial character code into a parallel register. First, to keep track of time, the receiver employs a clock which "ticks." When the line is in the space condition, the receiver samples the line 16 times the data rate. In other words, a data interval is equal to 16 clock ticks. In this way the receiver can determine the beginning of the start bit and "move over" to the center of the bit time for data sampling. Second, when the line goes into the mark state, declare a "looking for start bit" condition and wait one half the bit interval or eight clock ticks. Third, sample the line again and if it has not remained in the mark condition, consider this to be a spurious voltage change and go back to step one. Fourth, if the line was still in the mark state, then consider this a valid start bit. Shift the start bit into an eight-bit shift register and wait one bit time or 16 clock ticks. Fifth, after one bit time sample the line (the data should have been there for the last eight clock ticks, and should remain for eight more clock ticks). Now shift the sample into the shift register. Sixth, continue steps four and five seven more times. After the eighth shift, the start bit will "migrate" into a flip-flop indicating character received. Go to step one.

Before the transmitter and receiver UARTs will work, they must also agree on the same values of five parameters. First, both sides must agree on the number of bits per character. Second, the speed or Baud of the line must be the same on both sides. Third, both sides must agree to use or not use parity. Fourth, if parity is used, both sides must agree on using odd or even parity. Fifth, the number of stop bits must be agreed upon.

Typical serial ports used with personal computers connected to modems used eight data bits, no parity, and one stop bit. Thus there is a rule-of-thumb that the number of ASCII characters per second is equal to the bit rate divided by 10 for a typical RS-232 or RS-423 data line.

The first UART-like devices were rotating mechanical commutators. These sent 5-bit Baudot codes for mechanical teletypewriters, and replaced morse code. Later, ASCII required a seven bit code. When IBM built computers in the early 1960s with 8-bit characters, it became customary to store the ASCII code in 8 bits.

Gordon Bell designed the UART for the PDP series of computers. Western Digital made the first single-chip UART WD1402A around 1971; this was an early example of a medium scale integrated circuit.

An example of an early 1980s UART was the National Semiconductor 8250. In the 1990s, newer UARTs were developed with on-chip buffers. This allowed higher transmission speed without data loss and without requiring such frequent attention from the computer. For example, the popular National Semiconductor 16550 has a 16 byte FIFO, and spawned many variants, including the 16C550, 16C650, 16C750, and 16C850.

Depending on the manufacturer, different terms are used to identify devices that perform the UART functions. Intel called their 8251 device a "Programmable Communication Interface". MOS Technology 6551 was known under the name "Asynchronous Communications Interface Adapter" (ACIA). The term "Serial Communications Interface" (SCI) was first used at Motorola around 1975 to refer to their start-stop asynchronous serial interface device, which others were calling a UART.

The less-common 5, 6 and 7 bit codes are now sometimes simulated with 8-bit UARTs. The unused high-order bits are set to 1, the value of the stop bit and idle line. This technique cannot send or receive at full speed, but provides some level of compatibility for older equipment.

Some very low-cost home computers or embedded systems dispensed with a UART and used the CPU to sample the state of an input port or directly manipulate an output port for data transmission. While very CPU-intensive, since the CPU timing was critical, these schemes avoided the purchase of a costly UART chip. The technique was known as a bit-banging serial port.

A UART usually contains the following components:

• a clock generator, usually a multiple of the bit rate to allow sampling in the middle of a bit period.
• input and output shift registers
• transmit/receive control
• read/write control logic
• optional transmit/receive buffers
• optional parallel data bus buffer
• FIFO (optional)

An "overrun error" occurs when the UART cannot process the character that just came in before the next one arrives. Various UART devices have differing amounts of buffer space to hold received characters. The CPU must service the UART in order to remove characters from the buffer. If the CPU does not service the UART quickly enough and the buffer becomes full, 'an'Overrun Error will occur.

A "framing error" occurs when the designated "start" and "stop" bits are not valid. As the "start" bit is used to identify the beginning of an incoming character, it acts as a reference for the remaining bits. If the data line is not in the expected idle state when the "stop" bit is expected, a 'a'Framing Error will occur.

A "parity error" occurs when the number of "active" bits does not agree with the specified parity configuration of the UART, producing a Parity Error. Because the "parity" bit is optional, this error will not occur if parity has been disabled. Parity error is set when the parity of an incoming data character does not match the expected value.

A "break condition" occurs when the receiver input is in at the "space" level for longer than some duration of time, typically, for more than a character time. This is not necessarily an error, but appears to the receiver as a charcter of all zero bits with a framing error.

Some equipment will deliberately transmit the "break" level for longer than a character as an out-of-band signal. When signalling rates are mismatched, no meaningful characters can be sent, but a long "break" signal can be a useful way to get the attention of a mismatched receiver to do something (such as resetting itself. UNIX systems and UNIX-like systems such as Linux can use the long "break" level as a request to change the signalling rate.

• Asynchronous serial communication
• Baud
• bit rate
• Modem
• Morse code
• Serial communication
• Serial port
• USB

Freebsd Tutorials (includes standard signal definitions, history of UART ICs, and pinout for commonly used DB25 connector)

UART Tutorial for Robotics (contains many practical examples)